Integrated circuit devices, such as logic and memory devices, are widely used in consumer and commercial applications. As the integration density of integrated circuit devices continues to increase, it may be desirable to form ultra thin layers, such as ultra thin dielectric layers, on a semiconductor substrate. These dielectric layers may be used, for example, as a gate dielectric layer of an insulated gate field effect transistor, also referred to as a MOSFET, and/or as a capacitor dielectric for an integrated circuit capacitor. As is well known to those having skill in the art, a field effect transistor includes spaced apart source and drain regions, a gate dielectric therebetween, and a gate electrode on the gate dielectric. Moreover, as is well known to those having skill in the art, an integrated circuit capacitor includes a first or lower electrode, a second or upper electrode, and a dielectric therebetween. Integrated circuit capacitors are widely used in integrated circuit memory devices such as Dynamic Random Access Memory (DRAM) devices.
Silicon dioxide is widely used as a dielectric layer for integrated circuit field effect transistors and/or capacitors. However, as the integration density of integrated circuits continues to increase, dielectric materials having a higher dielectric constant than silicon, such as Ta2O5, Y2O3, HfO2, ZrO2, Nb2O5, BaTiO3, SrTiO3 and/or other materials have been used.
Tantalum oxide (Ta2O5) has been widely used as the dielectric layer of a capacitor due to the potentially high thermal stability thereof. However, the tantalum oxide may react with a lower electrode of the capacitor. In particular, when polysilicon is used for the lower electrode, oxygen atoms contained in the tantalum oxide layer may react with silicon atoms contained in the polysilicon layer during a formation process of the tantalum oxide layer and/or during heat treatment after forming the tantalum oxide layer, so that the polysilicon layer may be oxidized. As a result, leakage current of the capacitor may increase.
Lower electrodes of a capacitor also have been made using metals, such as platinum (Pt), ruthenium (Ru), iridium (Ir) and the like, or of conductive metal nitride, such as titanium nitride (TiN). However, the metal or the conductive metal nitride used for the lower electrode may cause other problems.
In particular, the tantalum oxide layer may be continuously deposited in an atmosphere of oxygen by using a tantalum source and an oxygen source as an oxidizing agent. Examples of the tantalum source include TaCl5, Ta(OCH3)5, Ta(OC2H5)5, Ta(OC3H7)5, Ta(OC4H9)5, Ta(OC2H5) (OC3H7)4, or Ta(OC2H5)4(DMAE) (Ta(OC2H5)4 [OC2H5N(CH3)2], tetraethoxy tantalum dimethylaminoethoxide (hereinafter referred to as “TAT-DAME”), etc. Examples of the oxygen source include O2, H2O, H2O2, N2O, alcohols including OH group, etc. The combination of the tantalum source and the oxidizing agent may oxidize the lower electrode, which may decrease the quality of the tantalum oxide layer.
For instance, when ruthenium is used for the lower electrode of the capacitor, a surface of the ruthenium may be oxidized by the oxygen source to form a ruthenium oxide (RuO2) layer. The ruthenium oxide layer may prevent the tantalum oxide from being uniformly deposited on the lower electrode of the capacitor. When the tantalum oxide layer is used for a dielectric layer of a cylinder-shaped or a concave capacitor having a high aspect ratio, the above-mentioned low deposition quality may be particularly observed. That is, the tantalum oxide may not be deposited upon the ruthenium electrode at a lower opening portion of the cylindrical capacitor and may be excessively deposited on an upper opening portion of the cylindrical capacitor. Therefore, the step coverage of the tantalum oxide may be poor.
The dielectric layer of the capacitor can be deposited through a conventional Chemical Vapor Deposition (CVD) process, a low-pressure CVD (LPCVD) process, a plasma enhanced CVD (PECVD) process, and/or a sputtering process. See, for example, U.S. Pat. No. 6,339,009 and Japanese Published Application 2001-85423. However, the above and other CVD processes may be carried out at a relatively high temperature, which may have an adverse thermal effect on a device. Furthermore, a thin film layer deposited through the CVD process may have a non-uniform thickness and/or poor step coverage.